Spring 2012
Bachelor of Science in Information Technology (BScIT) – Semester 1/
Diploma in Information Technology (DIT) – Semester 1
BT0064 – Logic Design – 4 Credits (Book ID: B0948)
Assignment Set – 1 (60 Marks)
1. Convert the following octal numbers to base 10.
Ans. - Octal Numbers Base 10
a) 273 187
b) 1021 529
2. Convert the following decimal numbers to base 2:
Ans. - Decimal Numbers Base 2
a) 122 1111010
b) 98 1100010
3. List out the fundamental logical gates.
Ans. - There are three types of fundamental logical gates…..
a. AND
b. OR
c. NOT
6. Minimize the following functions using Quine-McCluskey tabular method:
a. 
b. 
(with don’t care terms 2,7,13,22,23)
Answer:
a. F = A'B'C' + B'D + BCD' + AC + ABD'
b. F = ACD + B'CE + A'B'D'E + A'C'D'E' + AB'D'E' + BC'DE + BCE' + ABC'E
Answer:
a. F = A'B'C' + B'D + BCD' + AC + ABD'
b. F = ACD + B'CE + A'B'D'E + A'C'D'E' + AB'D'E' + BC'DE + BCE' + ABC'E
7.What is Multiplexer? Draw the logic diagram of 8 to 1 line multiplexer.
Ans.- A multiplexer or mux (occasionally the term muldex is also found, for a combination multiplexer-demultiplexer) is a device that performs multiplexing; it selects one of many analog or digital input signals and outputs that into a single line.
An electronic multiplexer makes it possible for several signals to share one expensive device or other resource, for example one A/D converter or one communication line, instead of having one device per input signal.
An electronic multiplexer can be considered as a multiple-input, single-output switch. The schematic symbol for a multiplexer is an isosceles trapezoid with the longer parallel side containing the input pins and the short parallel side containing the output pin.
8-to-1 Multiplexer
8.What is comparator? Design the combinational circuit that will compare two bits A and B and produce 3 outputs A>B, A=B, A<B.
Ans.- A digital comparator is a hardware electronic device that compares two numbers in binary form and generates a one or a zero at its output depending on whether they are the same or not. Comparators can be used in a central processing unit (CPU) or microcontroller in branching software. A comparator can be simulated by subtracting the two values (A & B) in question and checking if the result is zero. This works because if A = B then A - B = 0.
The analog equivalent is the comparator. Many microcontrollers have analog comparators on some of their inputs that can be read or trigger an interrupt.
The operation of a single bit digital comparator can be expressed as a truth table: Inputs Outputs
A B A < B A = B A > B
0 0 0 1 0
0 1 1 0 0
1 0 0 0 1
1 1 0 1 0
The operation of a two bit digital comparator can be expressed as a truth table: Inputs Outputs
A1 A0 B1 B0 A < B A = B A > B
0 0 0 0 0 1 0
0 0 0 1 1 0 0
0 0 1 0 1 0 0
0 0 1 1 1 0 0
0 1 0 0 0 0 1
0 1 0 1 0 1 0
0 1 1 0 1 0 0
0 1 1 1 1 0 0
1 0 0 0 0 0 1
1 0 0 1 0 0 1
1 0 1 0 0 1 0
1 0 1 1 1 0 0
1 1 0 0 0 0 1
1 1 0 1 0 0 1
1 1 1 0 0 0
1 1 1 1 0 1 0
9.Define sequential circuits.
Ans.- A digital logic circuit or system is usually made up of combinational elements such as NAND and NOR gates and memory elements which may, for example, be discrete flip-flops or latches. Alternatively, an interconnection of these devices may be found in a shift register, a counter, or in a variety of MSI and LSI packages. With the introduction of memory elements as components in digital systems, an additional variable, time, has been introduced and must be taken into account when designing digital systems.
10.Explain practical concepts and applications of DAC.
Ans.- In electronics, a digital-to-analog converter (DAC or D-to-A) is a device that converts a digital (usually binary) code to an analog signal (current, voltage, or electric charge). An analog-to-digital converter (ADC) performs the reverse operation. Signals are easily stored and transmitted in digital form, but a DAC is needed for the signal to be recognized by human senses or other non-digital systems.
A common use of digital-to-analog converters is generation of audio signals from digital information in music players. Digital video signals are converted to analog in televisions and cell phones to display colors and shades. Digital-to-analog conversion can degrade a signal, so conversion details are normally chosen so that the errors are negligible.
Due to cost and the need for matched components, DACs are almost exclusively manufactured on integrated circuits (ICs). There are many DAC architectures which have different advantages and disadvantages. The suitability of a particular DAC for an application is determined by a variety of measurements including speed and resolution.
Spring 2012
Bachelor of Science in Information Technology (BScIT) – Semester 1/
Diploma in Information Technology (DIT) – Semester 1
BT0064 – Logic Design – 4 Credits (Book ID: B0948)
Assignment Set – 2 (60 Marks)
1.Convert the following hexadecimal numbers to base 10:
Ans.- hexadecimal numbers base 10
a) 145 325
b) A2C1 41665
2.What are universal gates? Why they are called so?
Ans.- Universal gates are the ones from which we can design other gates also. for eg. NAND and NOR gates. they help in forming the uniformity in the circuits.
4. Implement a 8:1 MUX using 4:1 MUX.
Ans. - Function Implementation using an 8:1 Mux
The Mux inputs can be read directly from the truth table.
Function Implementation using a 4:1 Mux
Implementation the same function below using a 4:1 Mux+ an inverter. By manipulation the truth table, we can write F=0, 1, C and NOT C in a four-row truth table. Then, we can use a 4:1 Mux and a single inverter to implement the function.
5. Draw and explain the working of JK, S-R, and D flip flops.
Ans.- Set-Reset flip-flops (SR flip-flops):-
The symbol for an SR latch
The most fundamental latch is the simple SR latch (or simple SR flip-flop), where S and R stand for set and reset respectively. It can be constructed from a pair of cross-coupled NOR (negative OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high even after S returns low; similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low even after R returns low.
JK flip-flop:-
JK flip-flop timing diagram
The JK flip-flop augments the behavior of the SR flip-flop (J=Set, K=Reset) by interpreting the S = R = 1 condition as a "flip" or toggle command. Specifically, the combination J = 1, K = 0 is a command to set the flip-flop; the combination J = 0, K = 1 is a command to reset the flip-flop; and the combination J = K = 1 is a command to toggle the flip-flop, i.e., change its output to the logical complement of its current value. Setting J = K = 0 does NOT result in a D flip-flop, but rather, will hold the current state. To synthesize a D flip-flop, simply set K equal to the complement of J. The JK flip-flop is therefore a universal flip-flop, because it can be configured to work as an SR flip-flop, a D flip-flop, or a T flip-flop. NOTE: The flip flop is positive edge triggered (Clock Pulse) as seen in the timing diagram.
A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data inputs, Q is the stored data output, and Q' is the inverse of Q. The characteristic equation of the JK flip-flop is:
and the corresponding truth table is:
The origin of the name for the JK flip-flop is detailed by P. L. Lindley, a JPL engineer, in a letter to EDN, an electronics design magazine. The letter is dated June 13, 1968, and was published in the August edition of the newsletter.
D flip-flop:-
D flip-flop symbol
The Q output always takes on the state of the D input at the moment of a rising clock edge or at the moment of the falling clock edge but not both at the falling and rising edges and never at any other time. It is called the D flip-flop for this reason, since the output takes the value of the D input or Data input, and Delays it by one clock count. The D flip-flop can be interpreted as a primitive memory cell, zero-order hold, or delay line. Truth table:
('X' denotes a Don't care condition, meaning the signal is irrelevant)
These flip flops are very useful, as they form the basis for shift registers, which are an essential part of many electronic devices. The advantage of the D flip-flop over the D-type latch is that it "captures" the signal at the moment the clock goes high, and subsequent changes of the data line do not influence Q until the next rising clock edge. An exception is that some flip-flops have a 'reset' signal input, which will reset Q (to zero), and may be either asynchronous or synchronous with the clock.
7. Explain the working principle of 4 bit Johnson counter with a neat diagram.
Ans. - In the 4-bit counter to the right, we are using edge-triggered master-slave flip-flops similar to those in the Sequential portion of these pages. The output of each flip-flop changes state on the falling edge (1-to-0 transition) of the T input.
The count held by this counter is read the reverse order from the order in which the flip-flops are triggered. Thus, output D is the high order of the count, while output A is the low order. The binary count held by the counter is then DCBA, and runs from 0000 (decimal 0) to 1111(decimal 15). The next clock pulse will cause the counter to try to increment to 10000 (decimal 16). However, that 1 bit is not held by any flip-flop and is therefore lost. As a result, the counter actually reverts to 0000, and the count begins again.
In future pages on counters, we will use a different input scheme, as shown to the left. Instead of changing the state of the input clock with each click, you will send one complete clock pulse to the counter when you click the input button. The button image will reflect the state of the clock pulse, and the counter image will be updated at the end of the pulse. For a clear view without taking excessive time, each clock pulse has a duration or pulse width of 300 ms (0.3 second). The demonstration system will ignore any clicks the occur within the duration of the pulse.
8.Explain temperature and weather forecast system with a neat circuit diagram.
Ans.- The following circuit design satisfies these requirements. I selected the INA122 instrumentation amp for several reasons: it eliminated several external resistors and it provides a very stable gain over a wide temperature. It also provides excellent rail-to-rail operation allowing full use of the 10 volt input range of the DS2438. The 40.2K ohm resistor sets the gain to 10. The variable resistor allows adjustment of the offset voltage from 2.0v to 4.0v. All parts are available from Digikey except the pressure sensor, which is available from Newark.
9.Explain the functioning of digital multimeter.
Ans. - Multimeters are designed and mass produced for electronics engineers. Even the simplest and cheapest types may include features which you are not likely to use. Digital meters give an output in numbers, usually on a liquid crystal display.
The diagram below shows a switched range multimeter
10. Write a short note on ADC.
Ans. - An analog-to-digital converters an electronic integrated circuit, which converters continuous signals to discrete digital numbers.
Typically, an ADC is an electronic device that converter an input analog voltage to a digital number. The digital output may be using different coding schemes, such as binary, gray code or two’s complement binary. However, some non electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs.
Resolution can also be defined electrically, and expressed in volts. The coltage resolution of an ADC is equal to it’s over all voltage measurement range divided by the number of discrete intervals as in the formula:
Where:
Q is resolution in volts per step (volts per output code)
EFSR is the full scale voltage=VRefHi-Vreflo and M is the ADC’s resolution in bits.
The number of intervals is given by the number of available levels (output code),
Which is: N=2M
Example:-
Full scale measurement range = 0 to 10 volts
ADC resolution is 12 bits: 212 = 4096 quantization level (codes)
ADC voltage resolution is: (10V-0V)/4096 codes = 0.00244 volts/code
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